Use FlexChannel to deal with multi-bus system debugging

Most embedded systems use a multi-bus structure. In order to observe these systems, debugging and inspection tools must be able to Display the activities of multiple buses, as well as sensors, actuators, displays, and interface signals. The challenge is not only to look at multiple buses, but each bus requires different signaling methods, so different detection methods are required. Certain buses can be observed using single-ended measurements, while other buses require differential measurements.

Most embedded systems use a multi-bus structure. In order to observe these systems, debugging and inspection tools must be able to display the activities of multiple buses, as well as sensors, actuators, displays, and interface signals. The challenge is not only to look at multiple buses, but each bus requires different signaling methods, so different detection methods are required. Certain buses can be observed using single-ended measurements, while other buses require differential measurements. In order to view multiple buses, you may want to use digital logic channels to greatly expand the number of channels.

The new FlexChannel input channel can use the widest range of probes to meet the needs of measuring multiple different signals. Each FlexChannel can measure:

Use passive probes to measure a single-ended analog signal

Use TLP058 logic probe to connect 8 digital channels to measure 8 digital logic signals.

Use TekVPI® differential voltage probe to measure 1 differential Voltage signal.

Use IsoVuTM isolation measurement system to measure 1 optically isolated differential voltage signal

Use TekVPI® current probe to measure 1 current signal

Use FlexChannel to deal with multi-bus system debugging

The FlexChannel technology of Tektronix’s new 4 series MSO oscilloscope enables the input of each channel to be used as an analog channel or 8 digital logic inputs (using the TLP058 logic probe), or use both analog and spectrum views at the same time. Each domain has its own independent Collection control can be flexibly configured according to requirements. To capture high-fidelity bus signals, several factors need to be considered.

Acquire single-ended bus signals

Many commonly used low-speed and medium-speed buses use single-ended signaling to represent digital signals with a specific voltage relative to the system ground. Generally use the standard passive voltage probe of the oscilloscope or use the digital probe ON the mixed signal oscilloscope to capture these analog signals. The FlexChannel input supports both probe types. Some important factors that should be considered include:

The ground wire should be as short as possible. In order to successfully acquire analog signals, first ensure that the reference voltage of each channel is connected to the oscilloscope through a low-inductance path.

Make sure that the rise time of the measurement system is less than one-fifth of the signal rise time. The performance of the oscilloscope and probe must be able to represent the signal sufficiently and truthfully. A common criterion is to ensure that the bandwidth of the measurement system is at least five times the signal bandwidth, and the sampling rate is at least 3-5 times the signal bandwidth.

For the digital logic circuit on the MSO, the integrated system bandwidth of the oscilloscope and probe should be sufficient to capture the signal, and the sampling rate on the digital channel should be at least 10 times the signal frequency. Performance is usually expressed in terms of bandwidth or the smallest pulse width that can be detected.

Ensure that the probe impedance is large relative to the signal source impedance to minimize the impact of probe loading on the signal.

For low-power circuits, this is mainly the input resistance of the probe; for high-speed signals, this is mainly the input capacitance of the probe.

Acquire differential bus signals

In order to improve the anti-noise capability of the bus, and to improve the signal integrity of the higher-speed bus, differential signaling is usually used. Unlike single-ended signaling, differential signaling is represented by the voltage difference between two signals. For some low-frequency applications, single-ended probes can be used to capture each side of the differential signal, and the oscilloscope can calculate the mathematical difference. In practice, this technique is particularly prone to errors due to differences in probe gain, propagation delay, and compensation. The most reliable way to capture differential signals is to use an active differential probe, which uses a differential Amplifier at the probe tip to sense the voltage difference.

The performance considerations for single-ended probes listed above also apply to digital probes. However, it must be noted that differential probes can ignore or suppress common-mode signals. One of the main indicators of these probes is the common-mode rejection ratio (CMRR) at the frequency of interest. Tektronix provides a variety of differential probes with different performances, including the optically isolated IsoVuTM differential measurement system designed for the most demanding measurement environments.

For all signaling methods-threshold is the key

Regardless of the technique used to capture the signal, the analog representation of the bus signal is generally connected to an oscilloscope. Before correctly interpreting the bus signal, the analog signal must be compared with the threshold. If it exceeds the threshold, it is generally interpreted as high (“1”); if it is below the threshold, it is generally interpreted as (“0”). (In some cases, the analog voltage is compared with the threshold value inside the digital logic probe.)

Many embedded designs are based on multiple logic families and require the use of various digital thresholds. Some oscilloscopes support the setting of a dedicated threshold for each channel, which can achieve maximum debugging flexibility and acquisition fidelity.

Use waveform trigger mode to isolate signal integrity issues

When debugging the signal integrity problem of the parallel bus or serial bus, you should first use the standard trigger mode in the advanced oscilloscope to capture the signal that violates the design specification:

Pulse width triggering can be used to isolate glitches and minimum pulse width violations on clock and data lines.

You can use the timeout trigger to isolate the missing pulses, such as in the clock signal.

You can use rise time and fall time triggers to isolate signal edges that are too fast or too slow in your design.

Runt pulse and window trigger can be used to isolate digital signals with incorrect, too low or too high amplitude.

The multi-channel setup time and hold time trigger function compares the timing of one or more data signals with the clock signal to detect component setup time and hold time violations.

The design of embedded systems is becoming more and more complex, and the types of integrated signals are increasing. Once any signal integrity issues have been resolved, the next step is to verify that the broader system works as expected. The new series of MSO provides the best tool for debugging and testing multi-bus systems. It uses a 15.6-inch ultra-large high-definition display. The display area is twice that of a 10.4-inch display. The high-definition resolution can support multiple signals and buses.

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