Renesas Electronics Corp. has claimed the industry’s first RISC-V microcontroller (MCU) that is optimized for advanced motor control systems. The turnkey solution delivers a pre-programmed RISC-V ASSP that eliminates development costs and investments in RISC-V related tools and software. The production-ready solution can be used in a variety of applications, including home/building automation, health-care devices, home appliances, and drones.
RISC-V based R9A02G020 motor control ASSP. (Source: Renesas Electronics)
“The focus is ON application-specific segments, which require a complete system solution approach, and where the embedded core is not exposed and not configurable by the customer (as it would be with a standard microcontroller development approach),” said Bernd Westhoff, director of MCU product marketing, Renesas Electronics. “This ASSP provides a turnkey solution for end-users not demanding a specific CPU core architecture.
“From the hardware perspective, the implementation makes the difference when considering RISC-V,” Westhoff added. “The combination of the advanced CPU and its performance, the integrated analog and system-level safety-related features, together provide an ideal platform for motor control applications. In such selected target application areas Renesas and our partners can add value.”
Renesas worked with several partners to develop the new R9A02G020 motor control ASSP. The solution includes RISC-V processing IP from Andes Technology Corp. and comes with pre-programmed specialized application code developed by independent design houses (IDHs), BFG Engineering and DigiPower (HK) Technology Ltd. Both companies are specialists in motor control. BFG delivers sensorless algorithms that reduce motor start-up times and DigiPower offers cost-optimized, scalable motor drive solutions.
Key features of the ASSP include a 32-MHz, 32-bit CPU core based on the RISC-V ISA, analog IP functionality (including ADCs with three dedicated PGA and S/H, two DACs, two comparators, and a temperature sensor), advanced motor control timers, two watchdog timers, 48 KB Flash memory, 16 KB (4 KB with ECC) SRAM, and sensorless vector control. The operating temperature range is -40°C to 125°C. The device is available in 24- and 32-pin QFN packages.
Key features of RISC-V based R9A02G020 motor control ASSP. (Source: Renesas Electronics)
“This first solution kickstarts an early entry into RISC-V and its newly emerging ecosystem, by introducing RISC-V based ASSP products into the market,” said Westhoff.
He makes it clear that the “ASSP solution is developed in cooperation with specialized IDHs that are fully responsible for the application software portion.” Development by the IDHs does not include any third-party IP or open-source software, he added.
“On the hardware side, the built-in CPU core is not based on open-source IP, but a commercially-licensed CPU core from Andes Technologies,” said Westhoff.
“The RISC-V ISA royalty-free availability does not imply any implementation using such ISA is open source, this is a decision of the implementer licensing terms,” he explained.
The company also collaborated with SEGGER Microcontroller GmbH, leveraging the company’s ecosystem including Embedded Studio and J-Link, to create and test the motor control solutions.
A complete reference design is available, including hardware, software, kit, tools, hardware datasheet, software datasheet, GUI manual, and app notes. The RISC-V Motor Control Kit enables engineers to test and evaluate the performance of the RISC-V-based ASSP for motor control in a laboratory environment when driving any 3-phase permanent magnet synchronous motor (e.g., AC brushless motor) using an advanced sensorless field-oriented control (FOC) algorithm, said Renesas. The 3-Phase Motor Control with RISC-V Core Winning Combination uses the R9A02G020 and other compatible devices from the Renesas portfolio.
The company recently introduced the 64-bit general-purpose RZ/Five MPUs based on a 64-bit RISC-V CPU for IoT and industrial gateway applications. RISC-V automotive solutions are under development.
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